DeepSeek has sparked immense capital enthusiasm and ignited widespread market hopes, prompting everyone in the technology industry to seek its advantages. From the perspective of the downstream market, various manufacturers are adapting to the DeepSeek model, with some using it for office work and others for predictive analytics.

Amidst this enthusiasm, how will the upstream semiconductor industry be affected? Will the whirlwind of DeepSeek spark a revolution in the semiconductor industry?

With the continuous evolution of Moore's Law, the number of transistors integrated in today's large-scale chips has surpassed 10 billion. Due to the intricate complexity of the chip design process and the design itself, nearly all design teams rely on commercial EDA tools to assist in completing the entire chip design task.

Chip design and implementation involve an incredibly complex process system. Taking digital chips as an example, when the design team progresses with subsequent work based on the completed Verilog/VHDL code, the standard design process encompasses at least key steps such as logic synthesis, floorplan, clock tree synthesis (CTS), and placement & routing. Additionally, an extensive amount of simulation and verification work is necessary. Throughout this process, engineers must meticulously weigh multiple design goals, including power consumption, frequency, and area, while ensuring that the manufactured chip can accurately implement various functions.

Automation stands as the paramount driving force for human development. In the EDA industry, the integration of AI technology is no longer a novel concept. What AI can alter has consistently been a proposition explored by the EDA industry.

In the realm of chip design, as the design scale continues to expand, finding the optimal solution within a short period becomes increasingly challenging. For instance, as the number of transistors integrated in the chip grows, the circuit connection relationship becomes complex, and various design parameters influence one another. Discovering a perfect design solution that simultaneously meets all performance indicators poses a significant challenge. However, AI can offer a 'good enough' result within a reasonably short timeframe, fulfilling the needs of practical applications.

In predictive tasks within chip design, ML models can swiftly predict the optimized effects of chips at an early design stage by learning from extensive historical data and design experience. For example, when designing a new mobile chip, the ML model can rapidly predict the chip's performance, such as running speed and heat generation, when running specific applications, based on given design parameters like chip architecture, transistor count, and power consumption limits. Utilizing these prediction results, chip designers can minimize their reliance on time-consuming EDA tools and directly comprehend the approximate effects post-EDA tool execution. This allows designers to promptly adjust design parameters, thereby avoiding unnecessary errors and repeated work in subsequent design phases. Simply put, the ML model functions as an 'intelligent prediction assistant', drastically enhancing design efficiency by swiftly predicting EDA tool outcomes and reducing the number of actual EDA tool runs.

Unlike predictive tasks, optimization tasks demand higher standards. The optimization discussed here encompasses a broad spectrum and primarily refers to directly solving certain EDA problems. In essence, many EDA problems involve optimizing chips under specific conditions. Over the years, numerous traditional EDA algorithms have been amassed, serving as exceptional heuristic methods for addressing these issues. For instance, in the chip placement and routing problem, traditional EDA algorithms can logically arrange the positions of various components and plan the optimal circuit connection lines based on the chip's functional requirements and performance indicators. Currently, optimization methods grounded in machine learning can uncover solutions that are either superior or faster than traditional EDA algorithms.

EDA software has already accumulated some experience leveraging machine learning, which forms the foundation of large language models, providing a database for generative AI. Nevertheless, for EDA, there is still a substantial distance from merely proposing requirements to directly outputting chip designs.

Currently, AI can drive workflow optimization and data analysis solutions, while also assisting engineers with innovation through generative AI capabilities. However, in practical terms, many platforms claiming to be integrated with large AI models often merely offer advanced customer service rather than genuinely enabling AI to create content from scratch. This same issue persists in the EDA industry. Although numerous EDA companies assert the integration of AI/ML functions, their usage more closely resembles advanced assistants. The process of finding answers by consulting documents is simplified to a conversation with an AI assistant.

Cadence Design and Renesas Electronics have collaborated to develop an AI-based solution. This solution employs Cadence's Verisium Platform and Xcelium ML App. Leveraging the machine learning technology within the Xcelium App, Renesas Electronics' verification team can generate streamlined regression results. It also utilizes the existing randomized simulation platform to run boundary cases, aiding Renesas Electronics in early error detection. The Verisium AI-driven application has enhanced Renesas Electronics' overall debugging efficiency by sixfold and shortened the entire verification cycle.

Specifically, Verisium SimAI is a platform that utilizes machine learning technology to construct models from regression tests executed by the Xcelium simulator. These models can generate new regression tests with specific objectives, such as soak tests, enabling more efficient testing of the entire design or specific areas, thus boosting regression testing efficiency.

This platform also features a similar error search function that utilizes hard-to-detect fault information to identify similar errors. Through this technology, design verification (DV) engineers can improve work efficiency and minimize rework.

Synopsys has launched a tool named Synopsys.ai, which boasts collaboration, generation, and autonomy functions through conversational intelligence. Supported by large language models (LLM), its generative AI functions can be utilized in both local and cloud environments.

For chip developers, this suite introduces numerous conveniences following the integration of generative AI. The collaboration function facilitates better cooperation among developers; the generation function can be employed to create RTL designs, verification, and other auxiliary materials; the autonomy function enables the creation of workflows using natural language.

Synopsys stated that Synopsys.ai is a comprehensive AI-driven EDA solution suite. It fully leverages the powerful role of AI throughout the entire process, from system architecture to design and manufacturing. It swiftly responds to complex design situations and handles repetitive tasks such as design optimization space exploration, verification coverage, regression analysis, and test program generation. Simultaneously, it aids in optimizing the chip's power consumption, performance, and area. If the chip design team needs to transfer chip design from one foundry to another or migrate from one process node to another, the AI function can assist the team in swiftly completing this process.

Furthermore, Synopsys.ai is the first to offer a continuous dataset solution, accelerating the chip design, verification, and mass production processes. This AI-driven data analysis solution enables teams to unlock, connect, and analyze the vast amounts of data collected during design, verification, manufacturing, testing, and application scenarios. Its unique chip monitoring technology optimizes the chip's power consumption, performance, quality, yield, and throughput. Additionally, it provides comprehensive visualization capabilities, enabling developers to swiftly complete root cause analysis at any stage of the integrated circuit (IC) lifecycle.

Siemens' EDA solution has been in development for several years. In Siemens' EDA solution, AI technology is primarily applied in three crucial areas: core technology, process optimization, and providing a scalable open platform. For example, in design, AI can conduct in-depth analysis to help identify the root cause of problems and preemptively prevent potential future issues. The ability to automate using AI and verify the results obtained by AI is crucial in these aspects.

In Siemens' EDA solution, the verifiable engine is built upon accuracy, stability, domain expertise, and ease of use, ensuring that the results provided by AI algorithms are predictable, repeatable, and valuable when processing data. However, Siemens also noted that sometimes verification cannot be fully automated, requiring professionals to intervene and evaluate the results provided by AI to ensure their accuracy. At the end of 2024, Siemens acquired the EDA company Altair for $10.6 billion. The combination of Siemens' online digital platform Xcelerator and Altair will "create the world's most comprehensive portfolio of AI design and simulation products".

From the actions of these three industry giants, it is evident that the application of AI in the EDA field is continuously deepening. So, what changes will this bring to the work of chip design engineers?

In chip design, engineers need to manually check whether the query plan complies with specifications, review design and project documentation such as data, control, and test IP connections, and other requirements stipulated in IP and chip-level specifications. Merely the steps of cleaning up design code often consume several weeks of design time for an engineer or a team and involve hundreds of meetings to minimize errors during the project simulation and implementation phases.

Many of the AI actions mentioned by these three EDA giants are aimed at optimizing the design process and simplifying and enhancing repetitive tasks.

By broadening our horizons, third-party AI can compile a concise and easy-to-understand summary of all EDA documents related to the issue, eliminating the need to peruse numerous pages of user guides to figure out how to make the tool perform the desired operation. This saves engineering time and is already proving to be highly beneficial. From this perspective, large language models are already aiding engineers in the EDA process.

Based on this, it is clear that the vigorous development of large models does have a direct impact on the utilization of EDA.

Firstly, AI can help bolster the capabilities of junior engineers. Artificial intelligence can empower junior engineers to perform tasks akin to more experienced designers. When junior engineers utilize AI systems to optimize chip implementations, the system automatically incorporates advanced engineering knowledge into the process, enabling them to achieve better results more swiftly and accumulate experience. For young talents working independently, if the specification is correctly defined, the AI virtual assistant can provide guidance to the person communicating with it on what to inquire about, to some extent addressing the challenges faced by young talents working independently and experts capturing requirements.

Secondly, AI can optimize the division of labor among engineers. The involvement of artificial intelligence enhances the abilities of junior engineers, freeing up senior engineers from basic tasks to focus on larger and more intricate assignments, thereby fully leveraging the capabilities of engineers at various levels of experience.

Finally, it promotes cross-domain integration. In the fields of system design, digital design, and analog design, artificial intelligence blurs work boundaries, dismantles isolated working modes, and encourages a focus on end-to-end chip design, considering factors such as sign-off requirements.

However, there is still a considerable journey before AI truly transforms the EDA industry from the ground up. Liu Weiping of Huada Jiutian once stated, "The impact of AI on EDA tools is certainly not revolutionary but more auxiliary." An insider told Semiconductor Industry Horizons that EDA, as an engineering software output, cannot rely on probability but must be accurate. The manifestation of AI capabilities necessitates a vast amount of data for training, but EDA companies do not possess such extensive data. Models fine-tuned on limited data are not superior to experienced engineers in solving issues in customers' actual applications.

Kevin Kelly once remarked in "What Technology Wants": "In the future, AI will be more extensively utilized in jobs that are repetitive, rigid, and efficiency-driven. People can delegate such work to AI, thereby freeing themselves to engage in more creative endeavors." This statement also applies to the chip industry. Even with AI technology, human innovation remains the fundamental driver of industry progress.

Chip design has undergone numerous technological transformations throughout its development. In the past, whenever a change occurred, some predicted a decline in engineering jobs, but this was not the case. For example, when transitioning from schematic capture to register-transfer level (RTL) synthesis, engineers' efficiency in compiling gate circuits significantly improved, driving the expansion of chip scale and subsequently necessitating more chip designers. Today, the integration of artificial intelligence into chip design follows a similar trajectory. Artificial intelligence can assist engineers in accomplishing more tasks, such as parallelizing modules and designing larger-scale chips. Engineers' work methods will shift from editing tool scripts to interacting with AI systems, but engineers will remain indispensable in chip design.

As Huang Renxun noted, "AI will only replace those who do not know how to utilize it, and these individuals will be supplanted by those who do, but it will not replace humans." AI does not create the world; it is humans who use AI to forge a new world.