For smartphone AI, the emphasis is transitioning from raw computing power to memory capabilities.

You might question why smartphone manufacturers are constantly emphasizing AI these days. Yet, when we actually use these devices, most AI functionalities are still confined to basic 'question-and-answer' interactions. The issue doesn't lie in the computational capacity of smartphones.

Over the past few years, smartphone AI has seen limited breakthroughs. While the scale of AI models has expanded approximately 240-fold every two years over the past decade, hardware memory capacity has merely doubled. Computing power has surged forward, but the memory that supplies data to it has not kept pace.

On September 16th at 6 PM, the Nubia NaviX Ultra was officially unveiled. Defined by the company as the world's inaugural 'AI agent' smartphone, it was co-developed by ZTE and ByteDance, featuring the Doubao smartphone assistant. While it may seem like another AI buzzword, it represents a significant departure from traditional smartphone voice assistants.

AI on conventional smartphones is limited to answering questions; users are still responsible for problem-solving. In contrast, an AI agent smartphone can genuinely assist you in accomplishing tasks. You simply need to say, 'Book me a high-speed train ticket to Beijing tomorrow,' and it will handle opening the app, selecting trains, comparing prices, and choosing times—all without your intervention.

However, this capability raises a challenge. Compared to simple Q&A interactions, AI agents require continuous context understanding, task breakdown, tool invocation, and even cross-app operation. This not only tests the model itself but also places significantly higher demands on the phone's data throughput capabilities than before.

Every time a large model generates a Token, it necessitates continuous access to vast amounts of model weights and KV-cache data. Whether a chip performs smoothly often depends not only on the speed of its computing units but also on whether data can be delivered 'on time'.

Qualcomm's two recent innovations precisely target this increasingly apparent data transfer bottleneck. Firstly, on the 22nd of this month, Qualcomm will introduce a new generation Snapdragon flagship platform. Secondly, Qualcomm's data center business has unveiled a brand-new HBC high-bandwidth computing technology, with Meta and Microsoft Azure already signing on to adopt it.

One fits in your pocket, the other in a data center rack—they may seem unrelated, but their direction is the same: enhancing data fluidity.

How will Qualcomm's two initiatives make smartphones smarter?

Let's begin with the CPU. The new-generation Snapdragon flagship platform pushes the CPU clock speed to 5GHz, marking the first mobile CPU to achieve this milestone. For comparison, today's most powerful fifth-gen Snapdragon 8 Elite has a maximum CPU clock speed of 4.6GHz.

Moreover, Qualcomm states that this achievement is not based on simply piling on more advanced processes but relies on a fully customized design: microarchitecture, implementation plans, and CPU subsystem, with each core having an independent clock domain for separate frequency scaling.

However, compared to the eye-catching 5GHz figure, I believe another change is even more noteworthy: Qualcomm Oryon FlexCache.

In the past, CPU cache resources were relatively fixed. FlexCache aims to allocate cache resources more flexibly based on the load of different cores.

For example, previously, each chef had their own small cutting board, regardless of their workload. Now, the cutting boards in the entire kitchen can be allocated more flexibly—whoever has more work gets to use more.

This is particularly crucial for AI agents.

Unlike tasks executed all at once in the past, AI agents often need to run continuously for extended periods and may call on different processing resources at different stages. If data can remain in high-speed cache as much as possible, it reduces the delay and power consumption caused by repeatedly accessing system memory.

On the GPU side, Qualcomm has introduced two new innovations.

One is Adreno Neural Fusion. Simply put, it integrates neural network processing, AI super-resolution, and AI frame generation into a single graphics pipeline. Officials say this significantly reduces artifacts, improves frame rate stability, and sharpens details.

We all know that current mobile super-resolution (SR) has always involved trade-offs: tiny image details are prone to jitter, and fast-moving objects leave trails. Adreno Neural Fusion aims to solve these persistent issues in mobile AI graphics technology. Moreover, it already supports mainstream game engines like Unity and Unreal, lowering the adaptation threshold for developers.

The other technology is Adreno Matrix Cores. Qualcomm is introducing hardware better suited for matrix operations further into the GPU graphics pipeline, allowing AI models to participate more directly in graphics processing. However, the issue remains: computing speed is one thing; data keeping up matters just as much.

During AI computing, massive intermediate results are continuously generated. If this data is frequently transferred back and forth between the GPU and system memory, even the highest computing power will be slowed down by data transfer.

So this generation of the platform also equips the Adreno GPU with 18MB of HPM high-speed memory and, combined with Adreno's multi-slice architecture, allows more intermediate data to be processed as close to the GPU as possible.

In short: minimize unnecessary data movement. According to Qualcomm's data, under specific workloads, this solution can reduce power consumption by up to 40%.

The NPU has also added two new features in this generation.

The first relates to Transformers (neural network architectures entirely based on self-attention mechanisms). Previously, NPU hardware was designed around CNNs, making it highly inefficient when handling Transformers.

Yet AI agents are primarily powered by Transformers. So this generation adds a dedicated hardware component called the Element Accelerator, paired with vector computing units for high-throughput AI math calculations and scalar computing units for decision-making logic, routing, and orchestration.

The second addition is large-capacity shared memory, expanded by up to 50%.

What's the use of more shared memory? Here, we need to mention KV-cache. When a large model converses with you, it stores previously discussed content in the form of KV-cache for easy recall.

The larger its capacity, the longer the context the model can remember. The problem is that the NPU's internal storage can't hold it all, forcing it into system memory—which reads over ten times slower than NPU internal storage. This means that as contexts grow longer, output speeds slow down.

Qualcomm aims to keep more context and KV-cache within the NPU, reducing reliance on system memory and significantly speeding up output.

According to Qualcomm's data, for INT4 models, prefill speeds increase by up to 50%—meaning the model understands your text faster. The time to generate the first token is under 1.5 seconds, so from pressing send to the first character appearing on screen takes no more than a second and a half. Of course, this generation of mobile platforms supports more than just INT4—mainstream formats like INT2, INT8, FP8, and FP16 are all handled with ease. Whether speed or accuracy is prioritized depends on the developer.

However, simply increasing memory size isn't enough; smartphones also need to accommodate larger models. Currently, models commonly run on smartphones typically have around 3-4 billion parameters—anything larger won't fit.

Therefore, Qualcomm is collaborating with memory and model manufacturers to bring MoE (Mixture of Experts) models to edge devices. Think of it as an expert team that doesn't all mobilize at once—tasks are assigned based on need. For example, a 30-billion-parameter MoE model only activates about 3 billion routed parameters per token generated on the NPU, while the remaining 'experts' stay on standby until needed.

This retains the performance ceiling of large models without requiring all parameters to be active for every inference.

The upgrades across these three areas serve one purpose: minimizing data 'detours'.

For AI agent smartphones, the most noticeable improvements will likely be faster responses, longer context memory, smoother multitasking, and edge AI agents finally evolving from 'barely usable' to genuinely convenient.

Moreover, a wave of products exploring AI agent experiences based on the Snapdragon platform has already emerged. Besides the Nubia NaviX Ultra mentioned earlier, the Honor Robot Phone released in August relies on the fifth-gen Snapdragon 8 Elite's NPU to develop embodied intelligence and auto-cinematography features. Even the earlier Nubia M153 Doubao smartphone assistant tech preview was built on the Snapdragon platform.

As AI shifts from answering questions to executing tasks continuously, the challenges for chip platforms extend beyond simply 'providing computing power'.

AI isn't lacking in computing power—it's lacking in 'delivery speed'.

We've been discussing 'data transfer,' but the AI industry's biggest headache right now is the 'memory wall'.

Imagine a restaurant with new equipment that lets chefs cook much faster, but the path from warehouse to kitchen remains unchanged, causing ingredients to arrive only every half hour. Originally, chefs could finish a dish in ten minutes but now spend the rest of their time waiting idly by the stove.

AI chips face a similar issue. They may appear to 'generate tokens one by one,' but each Token requires reloading vast model parameters and context data. This means AI chips aren't operating at full capacity—they're wasting time waiting for data. As computing power grows faster, this gap will only widen.

To address this, the industry has made attempts.

One is HBM (High Bandwidth Memory), which uses extremely high memory bandwidth to let computing chips access data faster—like expanding a single-lane road into a highway between the restaurant and warehouse. Another is SRAM, which keeps more data directly near computing units—like moving ingredients straight into the kitchen so chefs don't need to take a step.

However, both methods have clear drawbacks: wider roads require more wiring and pins, driving up costs, and every time data crosses chip boundaries, it incurs additional power and time penalties. As for stacking memory directly beside computing units (SRAM), while effective, it's prohibitively expensive and subject to production capacity constraints—not everyone can afford it.

Qualcomm offers a third solution: instead of moving data to computing units, move computing to the data. Officially called HBC (High Bandwidth Compute).

Specifically, Qualcomm places part of the computing logic directly beneath memory, using 3D stacking and through-silicon vias to vertically integrate computing units with LPDDR memory. This way, some raw data no longer needs to frequently cross chip boundaries—it can be processed near memory, with only the final results sent out.

With less data to transmit, chip bandwidth and power pressure naturally decrease.

According to Qualcomm's data, HBC delivers six times the bandwidth per watt of HBM and 200 times the capacity per watt of SRAM. It effectively boosts speed while accommodating sufficiently large AI models.

Moreover, this technology has a clear product roadmap. The first-gen HBC technology will debut on the AI250 AI inference accelerator card, expected to sample in mid-2027 with a single-card effective bandwidth of 133TB/s—18 times that of the previous AI200. By the AI300, HBC will upgrade to its second generation, delivering 54 times the data of the AI200 and single-card memory bandwidth per watt 4-8 times higher than existing GPU architectures, sampling in 2028.

Many readers might wonder: what's the point of discussing technologies commercializing in 2027 or 2028 now?

I believe the significance lies in direction. HBC's principle of 'bringing computing to data' aligns closely with the FlexCache, HPM, and shared memory expansions on the new smartphone platform. Data centers aim to reduce the token cost per inference, while smartphones hope to shorten the time for AI agents to understand, decide, and execute. The scenarios differ vastly, but the effort points in the same direction.

The deciding factor in the second half may lie in memory.

In recent years, smartphone AI has competed on computing power, but in the age of AI agents, simply 'computing fast' is no longer enough. As models grow larger and contexts longer, whether data can reach computing units in time directly determines how usable AI is.

This is why Qualcomm implemented FlexCache, HPM, and shared memory expansions on smartphones while launching HBC for data centers. Though the scenarios differ, both address the same issue: minimizing data detours.

Current AI agent smartphones primarily solve 'can it get things done?' Once next-gen platforms improve cache, memory, and data transfer efficiency, the next competition will be 'how fast and smoothly it gets things done.'

I believe this may truly mark the second half of smartphone AI: computing power remains important, but the focus of experience gaps is shifting from computing power to memory.