Filling the Last Gap in the Puzzle

Written by/ Chen Dengxin

Edited by/ Li Jinlin

Formatted by/ Annalee

The chip industry consistently triggers heightened sensitivity within the internet sector.

The increasingly intricate international landscape has disrupted the global chip supply chain. As the date of November 1, 2025, draws near, competition over crucial software has emerged as a new focal point.

Among these, EDA design software stands out as the most prominent.

EDA, often referred to as the 'mother of chips,' has long been under the dominance of overseas giants, rendering it the most vulnerable link in the domestic substitution process for chips. At this pivotal moment, external concerns are mounting.

So, how far along has domestic EDA development progressed?

Long-Term Market Dominance by Overseas Titans

To excel in any endeavor, one must first equip themselves with the right tools.

EDA, an acronym for Electronic Design Automation, serves as an indispensable auxiliary tool in chip design.

Tang Zhimin, Dean of the Computing and Microelectronics College at the Shenzhen Institute of Advanced Technology, remarked, 'In the semiconductor supply chain, the seamless integration of design and manufacturing is crucial for producing cutting-edge products. EDA design software acts as the pivotal link connecting these two aspects.'

The significance of EDA is undeniable.

An industry insider shared with Zinck Degree, 'In the early days, circuit boards featured only a handful, a dozen, or perhaps a few dozen transistors, and hand-drawn layouts sufficed. Now, with billions of transistors, EDA has become as essential as rice is for cooking.'

The same insider further emphasized that EDA is to chips what CAD is to architecture, silhouettes to short videos, Photoshop to art, and Unity to gaming—indispensable yet often overlooked.

The issue lies in the fact that the EDA market has long been dominated by three U.S.-based companies: Synopsys, Cadence, and Siemens EDA.

According to TrendForce data, in 2024, Synopsys, Cadence, and Siemens EDA held global market shares of 31%, 30%, and 13%, respectively, collectively accounting for 74% of the market.

Source: TrendForce

In China, the EDA trio also commands a market share exceeding 70%.

This dominance is rooted in a deeper historical context: In the mid-1980s, the prototypes of the EDA trio emerged, while domestic EDA was still in its infancy. It wasn't until 1993 that the first domestic EDA, the 'Panda System,' emerged to fill the void.

Despite lagging behind international advanced levels by several years, the 'Panda System' was highly anticipated.

Jiwei Net reported, 'Due to its price being only one-tenth of similar products, the 'Panda System' was even selected by some U.S. chip manufacturers, causing a significant stir in the market.'

Unfortunately, the EDA trio soon entered the Chinese market.

Leveraging tactics such as free giveaways and multi-party collaborations, combined with their technological first-mover advantage, they swiftly captured the domestic market, pushing the 'Panda System' and other domestic EDA solutions to the sidelines.

A software engineer shared with Zinck Degree, 'Any software has a characteristic: it's not about being perfect but about having users. As long as it continuously accumulates and iterates to create a mature ecosystem, the market won't give new entrants a chance.'

Consequently, EDA became the biggest weakness in the domestic substitution process for chips.

EDA Design Process

In recent years, tech companies in sectors such as mobile phones, automobiles, and the internet have embarked on self-developed chip paths. Xiaomi developed the SoC chip Xuanjie O1, Li Auto developed the intelligent driving chip M100, Baidu developed the cloud-based full-function AI chip Kunlun, and Alibaba developed the AI inference computing chip Li-NPU...

This has led to a surge in demand for EDA.

According to the China Semiconductor Industry Association, the chip supply chain is divided into three segments: design, manufacturing, and packaging/testing. Both the design and manufacturing segments require EDA, with a combined weight exceeding 75%.

This implies that if the EDA trio were to revoke their licenses, the industry could face a 'chokehold.'

'Yuanchuan Technology Review' stated, 'Once EDA vendors stop licensing chip design companies, it means the latter cannot obtain the latest PDKs from foundries, making new process-based designs and tape-outs impossible.'

Against this backdrop, the burden on domestic EDA has intensified.

Overtaking on Curves Is Not a Pipe Dream

In reality, domestic EDA has not remained stagnant but has been steadily progressing.

One approach is to find differentiated survival spaces.

The technological successor to the 'Panda System' is Empyrean, which found a breakthrough in the liquid crystal display (LCD) sector, becoming a globally renowned supplier of full-process FPD (flat panel) design solutions. One in every three smartphone screens worldwide is powered by a chip designed using Empyrean's EDA.

After establishing a foothold, Empyrean expanded its boundaries into the core areas of chip design.

Financial reports indicate that Empyrean's full-process tools have a penetration rate of 35% among domestic fabless companies, up 22 percentage points from 2020, with leading clients like HiSilicon and ZTE Microelectronics accounting for over 40% of its procurement.

Empyrean ranks just behind the trio. Source: Zhongyuan Securities Research Institute

Another approach is to focus on high-end markets.

Most companies lack Empyrean's full-process capabilities and instead choose to deeply cultivate specific markets. A representative example is Primarius Technologies, which focuses on the high-end market for device modeling and circuit simulation, aiding in the import substitution of 5G base station chips.

Notably, Primarius's NanoSpice high-precision simulator has passed Samsung's 3nm GAA process certification, placing it alongside Synopsys and Cadence as one of only three global players in this field.

Additionally, Primarius acquired Chengdu Micro (an IP supplier) and Naneng Micro (a power management IP company), aiming to shorten the chip product cycle from design to verification and market launch through an 'EDA+IP core' approach, evolving into a one-stop chip design solution to enhance market competitiveness.

It's crucial to note that in recent years, with rising uncertainties, accelerating EDA localization is no longer a choice but a necessity. To gain control over key software autonomy in the chip sector, a wave of new entrants has emerged in the field.

TechNode data shows that the number of companies developing EDA software in China far exceeds the combined total of other regions worldwide, with at least 60 such companies.

Among them, Qiyunfang, which recently emerged from obscurity, stands out as a leader among the new entrants.

Not long ago, Qiyunfang officially announced two EDA design software products for schematic and PCB design. These products offer 30% better performance than industry benchmarks, shorten hardware development cycles by 40%, and increase the success rate of intelligent auxiliary design in one version by 30%. Over 20,000 engineers are already using them.

More importantly, Qiyunfang has introduced disruptive innovations.

Serial operations are the basic philosophy of overseas EDA, deeply influencing the entire industry's development. Qiyunfang did not follow this conventional path but instead adopted a parallel operations approach, focusing heavily on collaborative design. Its schematic design software supports 100 people designing simultaneously online, while its PCB design software supports 20 people collaborating online.

'Huanchen Technology' stated, 'Traditionally, it was believed that latecomer countries could only 'catch up step by step' in high-tech fields. However, Qiyunfang has directly achieved 'performance surpassing.' This breakthrough is not simply 'domestic substitution' but establishes a new technological coordinate system in core metrics like design efficiency and compatibility through algorithmic reconstruction and architectural innovation.'

As a result, domestic EDA has evolved from a follower of international standards to a definer of international standards, opening up the possibility of overtaking on curves.

In fact, with the AI wave, the likelihood of domestic EDA overtaking on curves has increased even further.

Large models can predict chip performance when running specific applications, reducing repetitive EDA work, avoiding unnecessary errors, and significantly boosting work efficiency.

'Semiconductor Industry Review' stated, 'In chip placement and routing, traditional EDA algorithms can arrange component positions and plan optimal circuit connections based on functional requirements and performance metrics. Now, machine learning-based optimization methods can find better or faster solutions than traditional EDA algorithms.'

More critically, in AI empowerment for EDA, domestic and foreign companies are on equal footing. Whoever can first find an efficiency multiplier will prevail in future competition.

For example, Primarius Technologies is developing a device modeling AI system based on the Transformer architecture, aiming to reduce modeling time from the traditional two weeks to 24 hours.

In summary, the EDA field is undergoing significant transformation, with ensuring self-sufficiency becoming an industry priority. Domestic established EDA players and new EDA forces are working together to fill the last gap in the puzzle for chip domestic substitution.

Sooner or later, 'China Chips' will no longer be constrained by external factors.