In 2024, the birth of Sora, a video tool, has added more excitement to the already booming AI application field.

Recently, Google's AI research laboratory DeepMind announced that it is developing an AI technology called V2A (Video to Audio) for generating music for videos. This technology is seen as a significant advancement in AI in the field of media creation, aiming to address the issue of existing AI models' inability to generate sound effects simultaneously.

Data from multiple institutions indicate that this year will be the first year of AI terminal development. In 2024, 16% of global smartphone shipments will be AI phones, and by 2028, this proportion will surge to 54%. Among the PCs shipped in 2024, the proportion of AI PCs will be close to one-fifth (20%). By 2027, this proportion will rapidly increase to over 60%.

As we all know, artificial intelligence is a new type of technological tool. It functions similarly to other tools: enabling users to complete tasks more efficiently and easily. AI chips, also known as AI accelerators or computing cards, are chips specifically designed to handle AI-related computing tasks. They are an essential cornerstone for building computing power.

The rapid iteration of AI applications has placed higher demands on chip computing power. AI servers representing the core of cloud computing power, key high-performance computing chips (HPC), and high-bandwidth memory (HBM) are all areas where semiconductor companies are actively making deployments. At the same time, as chip functionality becomes increasingly complex, data volumes continue to increase, and the limits of chip manufacturing processes approach, the testing field is also encountering unprecedented complexity and challenges.

As a leading global provider of semiconductor testing solutions, Smiths Interconnect focuses on high-end testing applications such as high-performance computing, data centers, mobile phones, 5G communications, and other fields requiring high computing power, high processing speed, and massive data processing. It has established a leading position in the high-speed testing field through its high-pin, micro-pitch, high-power consumption high-speed coaxial test socket DaVinci series.

Smiths Interconnect's semiconductor testing product line includes wafer testing before packaging, finished product testing after packaging, system-level testing, and burn-in testing, providing customers with complete testing solutions. Smiths Interconnect has long-term cooperation with domestic and international IC design companies and packaging and testing manufacturers. From early-stage design verification, small-batch production to mass production orders, we have global research and development, sales service locations, and a comprehensive supply chain to provide customers with comprehensive online services.

Product updates and iterations in the AI industry are rapid, and more computing power requires more integrated transistors. A single chip can have a huge area of up to 878 mm² (31.6mm＊27.8mm) with pin counts reaching approximately 17,000. Such a high pin count and oversized chip area pose significant hardware design requirements and technical challenges in maintaining high test stability during complex testing for the development and design of product testing solutions.

To meet the design and testing needs of such large chips, Smiths Interconnect's DaVinci 112 high-speed test socket is specifically developed for chip testing with a size of 100 mm² or larger and over 25,000 pins, making it an ideal choice for testing complex functions of ASICs (Application Specific Integrated Circuits).

The DaVinci 112 high-