On April 15, 2024, Tesla CEO Elon Musk announced on the X platform that Tesla’s next-generation AI5 chip had successfully completed tape-out. In April 2026, the first physical images of the chip were made public. This milestone signifies Tesla’s strategic shift from "relying on external computing resources" to "self-developing and controlling core technologies," sending shockwaves throughout the global AI chip and autonomous driving industries. Tape-out indicates that the design blueprint has been officially transferred to the foundry, marking a critical phase before mass production. Mass production is scheduled for 2027, at which point the AI5 will fully replace the AI4 (HW4.0) as the core computing engine for Tesla’s Full Self-Driving (FSD) system and humanoid robot Optimus.

I. Performance Revolution: A Comprehensive Leap, Benchmarking Against Industry Leaders

The AI5 chip achieves remarkable breakthroughs in performance metrics. Musk disclosed that its overall performance is approximately 40 times greater than its predecessor, the AI4 (HW4.0), with key indicators experiencing explosive growth: the single-chip AI computing power nears 2,500 TOPS (trillion operations per second), and the memory capacity reaches 144GB. In terms of AI inference efficiency, the AI5 is optimized for the latest Transformer architecture.

When compared to industry leaders, the AI5 demonstrates strong competitiveness. NVIDIA’s Blackwell architecture GPU offers up to a fivefold improvement in inference performance over its predecessor, the Hopper architecture. As a dedicated chip, the AI5 aims to maximize computing power utilization by focusing on specific scenarios such as autonomous driving and robotics, thereby challenging the efficiency of general-purpose GPUs in certain domains.

II. Supply Chain Strategy: A Dual-Foundry Approach, Focusing on U.S. Domestic Manufacturing

The mass production strategy for the AI5 reflects Tesla’s diversified supply chain approach. The chip is set to be co-manufactured by Samsung and TSMC, with production also planned for U.S. domestic factories: Samsung will handle production at the Taylor, Texas factory (utilizing a 2nm process), while TSMC will manage production at the Arizona factory (using a 3nm process). This "dual-foundry + domestic manufacturing" strategy aims to address several potential challenges:

1. Risk diversification: Reducing reliance on a single supplier to mitigate capacity fluctuations or geopolitical risks.

2. Capacity assurance: Leveraging the advanced processes of two leading foundries to ensure delivery capabilities for large-scale mass production in 2027.

3. Policy compliance: Advancing U.S. domestic manufacturing aligns with the support orientation of the U.S. "CHIPS Act" for local semiconductor capacity.

III. The Battle for Survival: Why Self-Developed Chips Are Vital for Tesla’s Future

Musk rarely revealed: "Solving the AI5 challenge is a matter of survival for Tesla. We had to concentrate two teams simultaneously, and I personally devoted every Saturday for several months." This statement unveils the profound logic behind Tesla’s self-developed chips—computing power is the "lifeline" of autonomous driving, and self-development is the only path to breakthrough.

Tesla’s journey in self-developing chips is a long struggle from passivity to initiative:

2014: Reliance on Mobileye EyeQ3 (HW1.0), with computing power of only 0.256 TOPS and limited functionality.

2016: Transition to NVIDIA Drive PX2 (HW2.0/HW2.5), with computing power increased to 21 TOPS (HW2.0) or 144 TOPS (HW2.5), but core computing power remained constrained by external suppliers.

2019: Launch of the first self-developed chip, HW3.0 (FSD chip), with computing power of 144 TOPS, officially breaking free from NVIDIA’s dependence.

2023: Mass production of HW4.0, with computing power significantly increased to 720 TOPS.

2026: AI5 tape-out, achieving a 40-fold leap in comprehensive performance, with a dual-foundry layout aiming for comprehensive leadership.

The core challenge lies in the exponential growth in computing power demand for FSD algorithm iterations as Tesla’s global fleet expands. External procurement of high-end GPUs faces issues such as delivery delays and high costs. Self-developing the AI5 is essentially about building a closed loop of "algorithm-data-computing power" to clear hardware obstacles for the large-scale deployment of high-level autonomous driving and robotics.

IV. Industry Upheaval: Tesla Reshapes the AI Chip Landscape, Challenging NVIDIA’s Dominance

The tape-out of the AI5 is not just a victory for Tesla but also a signal of intensifying competition in the global AI chip industry. For a long time, NVIDIA has dominated the high-end AI computing power market with its general-purpose GPUs, holding an 86.5% market share in AI chip revenue in the fourth quarter of 2024, for instance. The emergence of the AI5 challenges NVIDIA’s dominance from dimensions such as performance and specialized scenarios.

Impact on NVIDIA:

Performance benchmarking: The AI5’s single-chip computing power (2,500 TOPS) targets the high-end inference market, directly competing with NVIDIA’s latest architecture products.

Scenario customization: The AI5 is optimized for autonomous driving and robotics, potentially surpassing NVIDIA’s general-purpose chips in computing power utilization efficiency in specific scenarios.

Ecosystem independence: Tesla’s self-developed chips will reduce reliance on NVIDIA’s ecosystem, potentially inspiring other large tech companies to follow suit.

Impact on the industry:

Forcing competition: Tesla’s "dedicated chip" model may prompt more capable automakers or tech companies to join the self-development ranks, intensifying market competition.

Technology route diversification: The future AI chip market may further form a parallel pattern of "general-purpose (NVIDIA) + dedicated (Tesla and other manufacturers)".

V. Future Strategy: Dojo3 Advances Simultaneously, Vertical Integration Builds Barriers

The tape-out of the AI5 is not the endpoint but a new starting point for Tesla’s chip strategy. Musk also disclosed that with the basic completion of the AI5 chip design, the company will officially restart the research and development of the Dojo3 supercomputer project. This means Tesla is building a complete computing power system of "vehicle-mounted AI chips (AI5) + cloud supercomputing (Dojo)".

Dojo3: As the third-generation autonomous supercomputer, it aims to process the massive video data collected by Tesla vehicles for training the neural networks of the full self-driving system. Its restart will provide Tesla with powerful internal training capabilities, reducing reliance on third-party cloud computing power.

The ultimate goal is to build a full-stack technology barrier of "hardware-software-data-computing power" through chip self-development, supply chain autonomy, and computing power closure, strengthening Tesla’s core competitiveness in autonomous driving and robotics.

Conclusion: AI5 Tape-Out, a Crucial Step for Tesla and a Signal of Intensifying Industry Competition

The completion of tape-out for Tesla’s AI5 chip is an important milestone on its path to technological self-development. From relying on external computing power to self-developing and controlling core technologies, Tesla is gradually building a complete computing power ecosystem. The AI5 is not just a chip but also a strategic manifestation of Tesla’s breakthrough in computing power constraints and deepened vertical integration.

For Tesla, the AI5 is the key hardware foundation for achieving higher-level autonomous driving and robot commercialization; for the industry, the AI5 is a notable case of dedicated AI chips challenging the general-purpose market pattern, marking a new stage in AI chip market competition.

The AI5, planned for mass production in 2027, will be a new variable in the global AI computing power market. Tesla’s journey in chip self-development will also continue to extend with the advancement of projects like AI6 and Dojo3.

Source: Investors Network